Silicon Wafer Manufacturing - How does it made ?

A wafer is a thin slice of semiconductor material, such as a silicon crystal, used in the fabrication of integrated circuits and other microdevices. The wafer serves as the substrate for microelectronic devices built in and over the wafer and undergoes many microfabrication process steps such as doping or ion implantation, etching, deposition of various materials, and photolithographic patterning. Finally the individual microcircuits are separated (dicing) and packaged.

Silicon Wafer

Silicon is a gray , brittle, tetravalent, nonmetallic element occurring abundantly in nature. The symbol for Silicon is Si it’s atomic number is 14 and it’s atomic mass is 28.086. Relative to how many impurities or dopants (Boron, Phosphorus, Arsenic, Antimony, etc.) are placed into it’s crystal structure.

Simply put, the more dopant in the crystal lattice of Silicon the more it will conduct electricity. In theory pure monocrystalline Silicon will not conduct electricity very well at all, the beauty of Silicon is that it can be made to take on dopants precisely and after this doping it will normally remain stable under many adverse conditions. Wafers are formed of highly pure (99.9999% purity), nearly defect-free single crystalline material.

P-N Junction Band

One process for forming crystalline wafers is known as Czochralski growth invented by the Polish chemist Jan Czochralski. In this process, a cylindrical ingot of high purity monocrystalline silicon is formed by pulling a seed crystal from a ‘melt’. Dopant impurity atoms such as boron or phosphorus can be added to the molten intrinsic silicon in precise amounts in order to dope the silicon, thus changing it into n-type or p-type extrinsic silicon.

Polycristalline silicon wafer

The ingot is then sliced with a wafer saw (wire saw) and polished to form wafers. The size of wafers for photovoltaics is 100–200 mm square and the thickness is 200–300 um. Electronics use wafer sizes from 100–300 mm diameter. (The largest wafer made has a diameter of 450 mm but is not in production yet.)

P-N Junction Equilibrium Graph

P-Type wafers are Prime or Test wafers that have Boron as the main dopant. A P+ wafer is heavily doped with Boron <1 Ohm/cm2 (normally will be used as an Epi substrate). A P- wafer is lightly doped with Boron and usually has a resistivity >1 Ohm/cm2 an example would be 5-10 Ohm/cm2. P-type wafers can have a 100 orientation (most common) or a 111 orientation (the 111 substrate is normally used for Bi-polar devices).

N-Type wafers are Prime or Test wafers that have Phosphorus, Antimony or Arsenic as the main dopant. A N+ wafer is heavily doped <1 Ohm/cm2 (and very rare). The most common N-Type wafer is doped with either Antimony or Phosphorus and has a resistivity >1 Ohm/cm2 (normal for device building would be 2-10 Ohm/cm2). The later being used most commonly for advanced CMOS device fabrication where implanted P-Wells are used.

Manufacturing silicon wafers begin by growing a silicon ingot which can take one week to one month. More than 75% of all single crystal silicon wafers are grown by the Czochralski (CZ) method. Ingots are grown by placing chunks of polycrystalline silicon into a quartz crucible along with small quantities of dopants. The polycrystalline silicon are made from sand by means of a complex reduction and purification process using Trichlorosilane and Hydrogen. The dopants give the desired electrical properties for the grown ingot and determine the type of the ingot (P or N).

Silicon Wafer Manufacturing

Wafers under 200 mm diameter have flats cut into one or more sides indicating the crystallographic planes of the wafer (usually the {110} face). Wafers of 200 mm diameter and above use a single small notch to convey wafer orientation, with no visual indication of doping type. Silicon wafers are generally not 100% pure silicon, but are instead formed with an initial impurity doping concentration between 1013 and 1016 per cm3 of boron, phosphorus, arsenic, or antimony which is added to the melt and defines the wafer as either bulk n-type or p-type.

However, compared with single-crystal silicon’s atomic density of 5×1022 atoms per cm3, this still gives a purity greater than 99.9999%. The wafers can also be initially provided with some interstitial oxygen concentration. Wafers grown using materials other than silicon will have different thicknesses than a silicon wafer of the same diameter. Wafer thickness is determined by the mechanical strength of the material used; the wafer must be thick enough to support its own weight without cracking during handling.

The making of a Silicon wafer 

With all this talk of sand and glass it may begin to over simplify a very complex process. The process of growing Ingots of monocrystalline Silicon with a uniform and controlled dopant and oxygen content, and then to take these Ingots and grind, slice and polish them into the final Prime wafers mostly free of defects that major Fab’s will use to build advanced semiconductor devices on, is nothing short of a monumental task. At Process Specialties we don’t think that The Silicon Manufacturers will ever get enough credit for the work and the achievements they have made in helping to forward this industry to the place it is today.

Raw Material 

Silicon is the raw material of course, the crucible at the right is filled with pure Polysilicon chips. These chunks of Poly have been made from sand by means of a complex reduction and purification process using Trichlorosilane and Hydrogen. Then the Polysilicon is further distilled and reduced and finally deposited on heated Titanium or Tantalum tubes. After further processing it becomes the material you see at the RIGHT or it may be in a granular form. The Poly is in a quartz container called a crucible and this material is now ready to go on to the next processing step in the manufacturing of a high quality Silicon wafer. This part of the manufacturing process is carried out by large Silicon manufacturers or the material is sometimes purchased by Silicon companies from other vendors.

Crystal Pulling 

Crystal Pulling is the next step in the Manufacturing of a Silicon wafer. Once the proper “melt ” is achieved a “seed” of single crystal Silicon is lowered into the melt. The surface tension between the seed and the molten Silicon causes a small amount to rise with the seed, as it is pulled and cooled into a perfect monocystalline ingot with the same crystal orientation as the seed. Polysilicon chunks are loaded into quartz crucible of the furnace along with small amounts of dopants. The polysilicon is melted at a process temperature of 1400 deg. C in a high purity Argon gas ambient. Once the melt is achieved, a “seed” of a single crystal silicon is lowered into the melt and slowly pulled out. The surface tension of the seed and the molten silicon causes a small amount to rise with the seed, forming a perfect monocrystalline ingot with the same crystal orientation with the seed.


Finished monocrystalline ingot is ground to a rough size diameter and is either “notched” or “flatted” along its length to indicate the orientation of the ingot.


Ingots are sliced into wafers using a diamond ID saw. In the next step the Ingots are sliced into wafers using a diamond ID saw or other type of saw. Deionized water is used to cool the blade on this ID (inside diameter) saw.

Edge grinding

An important step in the manufacturing of silicon wafer to reduce wafer breakage in the remaining manufacturing processes or future device manufacturing processes. On Prime wafers, edges are also highly polished which can improve cleaning results and reduce breakage up to 400%.


Lapping the wafers accomplishes several things, it removes saw marks and surface defects from the front and backside of the wafers, it thins the wafer and relieves a lot of the stress accumulated in the wafer from the sawing process. Both before and after the lapping process many in-process checks will be done on the Silicon wafers and more fall-out will occur (good news for the people that need coin roll for test wafers). Edge grinding or rounding is an important part of the wafer manufacturing process, it is normally done before or after lapping, this rounding of the edge of the wafer is very important! If it is not done the wafers will be more susceptible to breakage in the remaining steps of the wafer manufacturing process and the device manufacturing processes to come. If you look at the edge of a finished wafer you will see the edge rounding even in the notch area of 200mm and 300mm wafers. Wafers after slicing are rough with saw marks and defects on both sides of wafers. Lapping removes saw marks and defects from the surface of the wafers, while also thins and relieves stress accumulated in the wafer from the slicing process.

Etching and cleaning

Using sodium hydroxide or acetic and nitric acids, the microscopic cracks and surface damage caused by lapping are removed, then followed by deionized water rinses.


Polishing requires a number of steps using progressively finer slurry (polishing compound). Polishing can be done on frontside or both side of the wafer. Prior to polishing wafers may receive “backside damag” such as a coating of polysilicon, bead blast or brush damage. Gettering draws defects in the silicon towards the backside of the wafer and away from the frontside of the wafer where devices are being built. Polishing is the next step in the wafer manufacturing process. Most Prime wafers go through 2-3 polishing steps using progressively finer slurry (slurry is the polishing compound). After polishing the wafers are rinsed in DI water and scrubbed to remove any residual slurry compounds from the wafer.

Final Cleaning

Next the SC2 clean which consists of Hydrochloric acid and Hydrogen peroxide followed by a DI water rinse. This step is to remove trace metals, residues, and particles on the wafers. The cleaning method is developed by RCA in 1970′s. The first part is called SC1 and consist of Ammonium Hydroxide followed by a diluted Hydrofluoric acid clean followed by a DI water rinse. Next the SC2 clean consists of Hydrochloric acid and Hydrogen peroxide followed by DI water rinse. After this cleaning and rinsing the finished wafers go through a frontside and backside scrub to remove the smallest particles.

Final sort and inspection

It is here that the wafers either meet or fail the specifications the customers (IC manufacturers) have asked for. Wafers are inspected to meet customer’s specifications. Most final sorting of wafers occurs on an automated system. These systems measure different parameters such as Thickness, Bow-Warp, TTV, Site & Global Flatness, Type and Resistivity. Particles, scratches and haze are measured on a separate automated system.

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